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Buck übersetzung

buck übersetzung

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If we assume that the converter operates in the steady state, the energy stored in each component at the end of a commutation cycle T is equal to that at the beginning of the cycle.

The above integrations can be done graphically. As these surfaces are simple rectangles, their areas can be found easily: For steady state operation, these areas must be equal.

From this equation, it can be seen that the output voltage of the converter varies linearly with the duty cycle for a given input voltage.

This is why this converter is referred to as step-down converter. In some cases, the amount of energy required by the load is too small. In this case, the current through the inductor falls to zero during part of the period.

The only difference in the principle described above is that the inductor is completely discharged at the end of the commutation cycle see figure 5.

This has, however, some effect on the previous equations. The inductor current falling below zero results in the discharging of the output capacitor during each cycle and therefore higher switching losses.

A different control technique known as Pulse-frequency modulation can be used to minimize these losses. We still consider that the converter operates in steady state.

Therefore, the energy in the inductor is the same at the beginning and at the end of the cycle in the case of discontinuous mode, it is zero.

This means that the average value of the inductor voltage V L is zero; i. This implies that the current flowing through the capacitor has a zero average value.

As can be seen in figure 5, the inductor current waveform has a triangular shape. Therefore, the average value of I L can be sorted out geometrically as follow:.

The inductor current is zero at the beginning and rises during t on up to I Lmax. That means that I Lmax is equal to:. It can be seen that the output voltage of a buck converter operating in discontinuous mode is much more complicated than its counterpart of the continuous mode.

Furthermore, the output voltage is now a function not only of the input voltage V i and the duty cycle D, but also of the inductor value L , the commutation period T and the output current I o.

As mentioned at the beginning of this section, the converter operates in discontinuous mode when low current is drawn by the load, and in continuous mode at higher load current levels.

The limit between discontinuous and continuous modes is reached when the inductor current falls to zero exactly at the end of the commutation cycle.

Using the notations of figure 5, this corresponds to:. Therefore, the output current equal to the average inductor current at the limit between discontinuous and continuous modes is see above:.

On the limit between the two modes, the output voltage obeys both the expressions given respectively in the continuous and the discontinuous sections.

In particular, the former is. These expressions have been plotted in figure 6. From this, it can be deduced that in continuous mode, the output voltage does only depend on the duty cycle, whereas it is far more complex in the discontinuous mode.

This is important from a control point of view. On the circuit level, the detection of the boundary between CCM and DCM are usually provided by an inductor current sensing, requiring high accuracy and fast detectors as: These assumptions can be fairly far from reality, and the imperfections of the real components can have a detrimental effect on the operation of the converter.

Output voltage ripple is the name given to the phenomenon where the output voltage rises during the On-state and falls during the Off-state.

Several factors contribute to this including, but not limited to, switching frequency, output capacitance, inductor, load and any current limiting features of the control circuitry.

At the most basic level the output voltage will rise and fall as a result of the output capacitor charging and discharging:.

We can best approximate output ripple voltage by shifting the output current versus time waveform continuous mode down so that the average output current is along the time axis.

When we do this, we see the AC current waveform flowing into and out of the output capacitor sawtooth waveform. A full explanation is given there.

We note from basic AC circuit theory that our ripple voltage should be roughly sinusoidal: This gives confidence in our assessment here of ripple voltage.

The paragraph directly below pertains that directly above and may be incorrect. Use the equations in this paragraph. Once again, please see talk tab for more: During the Off-state, the current in this equation is the load current.

In the On-state the current is the difference between the switch current or source current and the load current. The duration of time dT is defined by the duty cycle and by the switching frequency.

Qualitatively, as the output capacitor or switching frequency increase, the magnitude of the ripple decreases.

Output voltage ripple is typically a design specification for the power supply and is selected based on several factors. Capacitor selection is normally determined based on cost, physical size and non-idealities of various capacitor types.

Switching frequency selection is typically determined based on efficiency requirements, which tends to decrease at higher operating frequencies, as described below in Effects of non-ideality on the efficiency.

Higher switching frequency can also raise EMI concerns. Output voltage ripple is one of the disadvantages of a switching power supply, and can also be a measure of its quality.

A simplified analysis of the buck converter, as described above, does not account for non-idealities of the circuit components nor does it account for the required control circuitry.

Power losses due to the control circuitry are usually insignificant when compared with the losses in the power devices switches, diodes, inductors, etc.

The non-idealities of the power devices account for the bulk of the power losses in the converter. Both static and dynamic power losses occur in any switching regulator.

Dynamic power losses occur as a result of switching, such as the charging and discharging of the switch gate, and are proportional to the switching frequency.

The voltage drops described above are all static power losses which are dependent primarily on DC current, and can therefore be easily calculated.

For a diode drop, V sw and V sw,sync may already be known, based on the properties of the selected device. The duty cycle equation is somewhat recursive.

A rough analysis can be made by first calculating the values V sw and V sw,sync using the ideal duty cycle equation. This approximation is acceptable because the MOSFET is in the linear state, with a relatively constant drain-source resistance.

This approximation is only valid at relatively low V DS values. These losses include turn-on and turn-off switching losses and switch transition losses.

Then, the switch losses will be more like:. When a MOSFET is used for the lower switch, additional losses may occur during the time between the turn-off of the high-side switch and the turn-on of the low-side switch, when the body diode of the low-side MOSFET conducts the output current.

This time, known as the non-overlap time, prevents "shootthrough", a condition in which both switches are simultaneously turned on.

The onset of shootthrough generates severe power loss and heat. Proper selection of non-overlap time must balance the risk of shootthrough with the increased power loss caused by conduction of the body diode.

When a diode is used exclusively for the lower switch, diode forward turn-on time can reduce efficiency and lead to voltage overshoot. Finally, power losses occur as a result of the power required to turn the switches on and off.

A complete design for a buck converter includes a tradeoff analysis of the various power losses. Designers balance these losses according to the expected uses of the finished design.

A converter expected to have a low switching frequency does not require switches with low gate transition losses; a converter operating at a high duty cycle requires a low-side switch with low conduction losses.

A synchronous buck converter is a modified version of the basic buck converter circuit topology in which the diode, D, is replaced by a second switch, S 2.

This modification is a tradeoff between increased cost and improved efficiency. In a standard buck converter, the flyback diode turns on, on its own, shortly after the switch turns off, as a result of the rising voltage across the diode.

This voltage drop across the diode results in a power loss which is equal to. You need to be logged in to start a new thread. Registration and participation are free!

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